1. Field of the Invention
The present invention relates to a memory device. In particular, the present invention provides a transistor for a semiconductor device and a method of forming the same, and more specifically to a transistor for a semiconductor device and a method of forming the same wherein a recess channel region is formed on a cell region to increase a channel length and a fin-type channel region is simultaneously formed on a peripheral circuit region to increase a channel area so as to simplify process steps, thereby improving the yield and productivity for manufacturing a semiconductor device.
2. Discussion of the Related Art
Recently, there has been a trend in demanding a transistor having sufficient drive current and lower power in order to increase its operating speed even though design rules of a semiconductor device are reduced. Channel area is one considerable factor for determining drive current a transistor for a semiconductor device. In a conventional transistor for a semiconductor device decreasing the design rules, a fin-type channel region is one of solutions for decrease in its drive current. In particular, it is expected that in case of a peripheral circuit region of DRAM, the fin-type channel region be formed to improve a short-channel effect and increase the drive current.
FIGS. 1 and 2 is layout views of a conventional transistor for a semiconductor device, and FIGS. 3A through 3C are cross-sectional views illustrating a conventional method of forming a transistor for a semiconductor device.
FIG. 1 is a layout view showing the peripheral circuit region of a conventional DRAM, and shows an active region 15 having a substantially large width on a semiconductor substrate 10 and a device isolation film 30 defining the active region 15.
FIG. 2 is a layout view showing a plurality of separate active regions 15 in order to form a fin-type channel region on a peripheral circuit region of the semiconductor substrate 10, and shows the active region 15 spaced apart from its neighboring active region 15 by a predetermined distance and a device isolation film 30 defining the plurality of active regions 15.
FIGS. 3A through 3C are cross-sectional views illustrating a conventional method of forming a transistor for a semiconductor device, wherein FIGS. 3A through 3C are taken along the line I-I′ shown in FIG. 2.
Referring to FIG. 3A, a pad oxide film (not shown) and a pad nitride film (not shown) are sequentially formed on a semiconductor substrate 10, and then the pad oxide film and the pad nitride film are etched using a device isolation mask as an etching mask to form a stacked structure of a pad oxide film pattern 17 and a pad nitride film pattern 20 defining a device isolation region. Next, the exposed semiconductor substrate 10 is etched using the stacked structure of the pad oxide film pattern 17 and the pad nitride film pattern 20 as an etching mask by a predetermined thickness to form a trench (not shown) defining an active region 15 shown in FIG. 2. Thereafter, a liner oxide film 23 and a liner nitride film 25 are formed on sidewalls of the trench, and then an oxide film (not shown) for a device isolation film is formed filling up the trench. After that, the oxide film is planarized until the pad nitride film pattern 20 is exposed so as to form a device isolation film 30.
Referring to FIG. 3B, the pad nitride film pattern 20 and the pad oxide film pattern 17 are removed, and then a mask pattern (not shown) defining a recess 35 shown in FIG. 2 is formed on the entire surface of the semiconductor substrate 10. Next, the device isolation film 30 is etched using the mask pattern as an etching mask by a predetermined thickness to form a plurality of protruding active regions. Thereafter, the mask pattern is removed.
Referring to FIG. 3C, the plurality of protruding active regions is implanted with impurity ions to form a fin-type channel region (not shown), and then a gate oxide film 40 is formed on the surface of the fin-type channel region. Next, a gate structure 50 is formed on a gate region 5 shown in FIG. 2.
However, according to the conventional transistor and method of forming the same, a mask process for forming a fin-type channel region on a peripheral circuit region differs from that for forming a recess gate on a cell region, and a plurality of separate active regions must be formed on the semiconductor substrate in order to the fin-type channel region. As a result, it must have a further mask and etching process. Accordingly, there is a problem of increasing product cost and decreasing yield for the semiconductor device due to increase in the process steps.